The hiring process
| Round | Format | What's tested |
|---|---|---|
| Online Assessment | ~60–90 min | Coding + core CS / domain aptitude |
| Technical Round 1 (DSA / fundamentals) | ~45–60 min | Data structures, algorithms, and language depth |
| Technical Round 2 (domain / project deep-dive) | ~45–60 min | Role-specific depth and system reasoning |
| Hiring Manager + HR | ~30–45 min | Fit, motivation, and lighter technical |
Process and cutoffs vary by drive/team and change over time — confirm on the official careers page.
Round-by-round: exactly what's asked & how to prepare
Online Assessment
~60–90 minA timed assessment mixing 1–2 coding problems with MCQs on OS, computer organization, and role-specific topics (C output/pointers for software, digital logic for hardware). Auto-graded, so correctness and edge cases dominate. Some campus drives add quantitative/logical aptitude.
- Array and string manipulation under time limits
- Pointer/memory and undefined-behavior reasoning in C
- Number systems, two's complement, and bit tricks
- Basic combinational/sequential logic truth-table questions
- Complexity estimation for a given snippet
- Grind 60–80 easy/medium arrays, strings, hashing on LeetCode
- Drill C gotchas via 'C Programming' sections on GeeksforGeeks
- Review computer organization from NPTEL / Nand2Tetris (free)
- Time yourself at 20 min/problem to build OA speed
- Ignoring MCQs to over-invest in one coding problem
- Skipping edge cases that hidden test cases catch
- Rusty on C pointer/array-decay semantics
- Clean passing solutions with handled edge cases
- Solid MCQ accuracy on fundamentals
- Finishing with buffer time
Technical Round 1 (DSA / fundamentals)
~45–60 minA live-coding interview on medium DSA with an interviewer probing complexity and alternatives. For software roles expect C/C++ specifics (memory, references, virtual functions); for hardware roles a mix of DSA plus digital fundamentals. Talk through your approach before coding.
- Trees/graphs traversal and shortest-path reasoning
- Sliding window and two-pointer optimizations
- Dynamic memory, stack vs heap, and RAII in C++
- Bit manipulation for masks and flags
- Trade-offs between hash maps and sorting
- Solve NeetCode 150 core patterns (free)
- Review C++ memory model and OOP from cppreference
- Practice explaining time/space out loud
- Rework problems asking for the optimal, not first, solution
- Coding before clarifying constraints
- Not stating complexity unprompted
- Freezing on a hint instead of adapting
- Structured approach then correct code
- Comfort discussing multiple solutions
- Precise language on memory/complexity
Technical Round 2 (domain / project deep-dive)
~45–60 minTailored to the team: OS/concurrency and low-level debugging for software; RTL, timing, FSMs, and verification for hardware/VLSI. Heavy resume drill where interviewers pick a project and press on every decision. Expect open-ended 'how would you design/debug' questions.
- Concurrency, locks, and race conditions (software)
- FSM design and setup/hold timing (hardware)
- Cache hierarchy and memory-ordering reasoning
- Verilog/SystemVerilog constructs and testbench thinking
- Debugging a described failure from symptoms to root cause
- Prepare 2 projects you can defend at architecture depth
- Review OS concurrency (OSTEP, free online)
- For HW, revise digital design from Harris & Harris
- Practice narrating a real debugging story end to end
- Vague 'the team decided' answers on your own project
- Overclaiming contributions you can't defend
- Missing the hardware/software interface angle
- Ownership and crisp cause-effect reasoning
- Depth on trade-offs you made
- Fluency at the HW/SW boundary
Hiring Manager + HR
~30–45 minThe manager gauges team fit, working style, and interest in AMD's roadmap, often with a few technical or scenario questions. HR covers logistics, relocation, and expectations. Show genuine interest in the specific product area.
- Why AMD and why this specific team
- Handling ambiguity and disagreement
- Learning approach for new toolchains
- Career interests within CPU/GPU/firmware
- Read AMD's recent product/architecture news
- Prepare STAR stories for conflict and failure
- Have thoughtful questions about the team's roadmap
- Know your salary range and constraints
- Generic 'big company' motivation
- No questions for the manager
- Inconsistent story vs earlier rounds
- Specific, informed interest in the team
- Coachability and clear communication
- Mature handling of past conflict
What to master
- Data structures & algorithms
- C / C++ and memory model
- Operating systems & concurrency
- Computer architecture & caches
- Digital logic & Verilog/SystemVerilog
- Timing, FSMs, and verification basics
- Bit manipulation & number systems
- Project/system debugging
Eligibility
Role-based: BE/BTech/ME/MTech in CS/ECE/EE for most SW/HW roles; strong CGPA helps in campus drives; PhD common for research/architecture. Experienced hires judged on domain depth over degree.
AMD salary & compensation (2026)
AMD pays competitive total comp with meaningful RSUs at senior levels; India CTC below is total (base + bonus + stock amortized), US is total comp.
| Role / Level | Experience | India — total CTC | US — total comp | What to know |
|---|---|---|---|---|
| New grad SWE/HW eng (L5 / SWE1) | 0–2 yrs | ₹18–26 LPA | $150–175K | Mostly base + joining bonus; small RSU grant |
| Engineer (SWE2 / L6) | 2–4 yrs | ₹28–42 LPA | $180–220K | Base growth plus larger annual RSU refresh |
| Senior Engineer (L7) | 5–8 yrs | ₹45–70 LPA | $230–300K | Stock becomes a large share of total comp |
| MTS / Principal (L8–L9) | 8–12+ yrs | ₹80–110+ LPA | $320–430K+ | RSU-heavy; bonus tied to company performance |
| Fellow / Sr Principal | 12+ yrs | ₹1.1 Cr+ | $450K+ | Large equity refreshers dominate |
How the package is structured
- Package = base + annual bonus (roughly 8–15% of base) + RSUs vesting over ~3–4 years
- Stock share rises sharply from senior levels up; new-grad grants are modest
- Biggest jumps come from level promotions and switching to GPU/architecture teams in demand
- Negotiate the RSU grant and joining bonus, which have more flex than base
Indicative 2026 market ranges aggregated from public sources (levels.fyi, Glassdoor, AmbitionBox, candidate reports). Compensation varies widely by location, team, level calibration, and negotiation — use these as directional benchmarks, not guarantees.
Your prep plan
- Days 1–3: Lock DSA patterns via NeetCode 150, timed at 25 min each
- Days 4–5: Deep-review C/C++ memory, pointers, and OOP internals
- Days 6–7: Refresh OS concurrency and computer architecture (caches, pipelines)
- Days 8–9: For HW roles, drill digital design, FSMs, timing, and Verilog
- Days 10–12: Rebuild 2 projects into defendable deep-dive narratives
- Days 13–14: Two mock interviews plus behavioral STAR prep
Want this plan dated to your interview?
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Get my personalized planFrequently asked questions
Does AMD focus more on DSA or domain knowledge?
Both, weighted by role. Software roles lean DSA plus C/C++ and OS; hardware/VLSI roles expect solid digital design, timing, and Verilog with lighter DSA. Every role includes a serious project deep-dive.
Is a referral useful?
Yes. Referrals reliably speed up the resume stage; the technical bar afterward is identical for everyone.
How hard is the coding compared to FAANG?
Coding is typically easy-to-medium rather than hard, but interviewers push hard on fundamentals and how your code maps to hardware.